NH82801GR S L8FY Intel, NH82801GR S L8FY Datasheet - Page 150

no-image

NH82801GR S L8FY

Manufacturer Part Number
NH82801GR S L8FY
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GR S L8FY

Lead Free Status / RoHS Status
Compliant
8.2.1
8.2.2
8.2.3
Table 8-4.
150
ISA Hole (15 MB-16 MB)
A hole can be created at 15 MB–16 MB as controlled by the fixed hole enable bit in the
LAC register (Device 0, offset 97h). Accesses within this hole are forwarded to the DMI.
The range of physical DRAM memory disabled by opening the hole is not remapped to
the top of the memory – that physical DRAM space is not accessible. This 15 MB–16 MB
hole is an optionally enabled ISA hole.
TSEG
TSEG is optionally 1 MB, 2 MB, or 8 MB in size. SMM-mode CPU accesses to enabled
TSEG access the physical DRAM at the same address. Non-CPU originated accesses are
not allowed to access SMM space. PCI Express, and DMI originated cycles to enabled
SMM space are handled as invalid cycle type with reads and writes to location 0 and
byte enables turned off for writes. When the extended SMRAM space is enabled, CPU
accesses to the TSEG range without SMM attribute or without WB attribute are also
forwarded to memory as invalid accesses. Non-SMM-mode Write Back cycles that
target TSEG space are completed to DRAM for cache coherency. When SMM is enabled
the maximum amount of memory available to the system is equal to the amount of
physical DRAM minus the value in the TSEG register which is fixed at 1 MB, 2 MB or
8 MB.
Pre-allocated Memory
Voids of physical addresses that are not accessible as general system memory and
reside within system memory address range (< TOLUD) are created for SMM-mode and
legacy VGA compatibility. It is the responsibility of BIOS to properly initialize
these regions.
Pre-Allocated Memory Example for 64 MB DRAM, 1 MB VGA and 1 MB TSEG
0000_0000h – 03DF_FFFFh
03E0_0000h – 03EF_FFFFh
03F0_0000h – 03FF_FFFFh
Memory Segments
Table 8-4
details the location and attributes of the regions.
SMM Mode Only - CPU
Intel® 3000 and 3010 Chipset Memory Controller Hub (MCH) Datasheet
Attributes
Reads
R/W
R/W
Available System Memory 62 MB
TSEG Address Range & Pre-allocated Memory
Pre-allocated VGA memory.
Comments
System Address Map

Related parts for NH82801GR S L8FY