AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 935

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

34.3.6.1
32072C–AVR32–2010/03
trace operation
Debug tools utilizing the AUX port should connect to the device through a Nexus-compliant Mic-
tor-38 connector, as described in the AVR32UC Technical Reference manual. This connector
includes the JTAG signals and the RESET_N pin, giving full access to the programming and
debug features in the device.
Table 34-5.
Figure 34-3. AUX+JTAG based Debugger
Trace features are enabled by writing OCD registers by JTAG. The OCD extracts the trace infor-
mation from the CPU, compresses this information and formats it into variable-length messages
according to the Nexus standard. The messages are buffered in a 16-frame transmit queue, and
are output on the AUX port one frame at a time.
Signal
MCKO
MDO[5:0]
MSEO[1:0]
EVTI_N
EVTO_N
Auxiliary Port Signals
Direction
Output
Output
Output
Output
Input
T r a c e b u f f e r
h i g h s p e e d
Trace data output clock
Trace data output
Trace frame control
Event In
Event Out
Description
A U X
M i c t o r 3 8
A V R 3 2
P C
A U X + J T A G
d e b u g t o o l
J T A G
AT32UC3A3/A4
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