AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 581

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

25.6.9
25.6.9.1
25.6.9.2
25.6.9.3
25.6.9.4
32072C–AVR32–2010/03
LIN Mode
Modes of operation
Receiver and Transmitter Control
Character Transmission
Character Reception
The LIN Mode provides Master node and Slave node connectivity on a LIN bus.
The LIN (Local Interconnect Network) is a serial communication protocol which efficiently sup-
ports the control of mechatronic nodes in distributed automotive applications.
The main properties of the LIN bus are:
LIN provides cost efficient bus communication where the bandwidth and versatility of CAN are
not required.
The LIN Mode enables processing LIN frames with a minimum of action from the
microprocessor.
The USART can act either as a LIN Master node or as a LIN Slave node.
The node configuration is chosen by setting the MODE field in the Mode Register (MR):
In order to avoid unpredicted behavior, any change of the LIN node configuration must be fol-
lowed by a software reset of the transmitter and of the receiver (except the initial node
configuration after a hardware reset). (See
See Section “25.6.2” on page 551.
See Section “25.6.3.1” on page 552.
See Section “25.6.3.7” on page 560.
• Single Master/Multiple Slaves concept
• Low cost silicon implementation based on common UART/SCI interface hardware, an
• Self synchronization without quartz or ceramic resonator in the slave nodes
• Deterministic signal transmission
• Low cost single-wire implementation
• Speed up to 20 kbit/s
• LIN Master Node (MODE=0xA)
• LIN Slave Node (MODE=0xB)
equivalent in software, or as a pure state machine.
Section
25.6.9.2)
AT32UC3A3/A4
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