AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 372

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

19.12.21 Last Destination Transaction Request Register
Name:
Access Type:
Offset:
Reset Value:
A bit is assigned for each channel in this register. LstDstReg[n] is ignored when software handshaking is not enabled for
the source of channel n.
A channel LSTDST bit is written only if the corresponding channel write enable bit in the LSTDST_WE field is asserted on
the same System Bus write transfer.
• LSTDST_WE[11:8]: Destination Last Transaction request write enable
• LSTDST[3:0]: Destination Last Transaction request
32072C–AVR32–2010/03
31
23
15
7
-
-
-
-
0 = Write disabled
1 = Write enabled
30
22
14
6
-
-
-
-
LstDstReg
Read/write
0x390
0x00000000
29
21
13
5
-
-
-
-
28
20
12
4
-
-
-
-
LSTDST_WE
LSTDST3
27
19
11
3
3
-
-
LSTDST_WE
LSTDST2
26
18
10
2
2
-
-
LSTDST_WE
AT32UC3A3/A4
LSTDST1
25
17
9
1
1
-
-
LSTDST_WE
LSTDST0
24
16
8
0
0
-
-
372