AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 437

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

21.8.14
Register Name:
Access Type:
Offset:
Reset Value:
• SPIWPVSRC: SPI Write Protection Violation Source
• SPIWPVS: SPI Write Protection Violation Status
32072C–AVR32–2010/03
SPIWPVS value
31
23
15
7
-
-
-
This Field indicates the Peripheral Bus Offset of the register concerned by the violation (MR or CSRx)
Write Protection Status Register
1
2
3
4
5
6
7
30
22
14
6
-
-
-
WPSR
Read-only
0xE8
0x00000000
The Write Protection has blocked a Write access to a protected register (since the last read).
Software Reset has been performed while Write Protection was enabled (since the last read
or since the last write access on MR, IER, IDR or CSRx).
Both Write Protection violation and software reset with Write Protection enabled have
occurred since the last read.
Write accesses have been detected on MR (while a chip select was active) or on CSRi (while
the Chip Select “i” was active) since the last read.
The Write Protection has blocked a Write access to a protected register and write accesses
have been detected on MR (while a chip select was active) or on CSRi (while the Chip Select
“i” was active) since the last read.
Software Reset has been performed while Write Protection was enabled (since the last read
or since the last write access on MR, IER, IDR or CSRx) and some write accesses have been
detected on MR (while a chip select was active) or on CSRi (while the Chip Select “i” was
active) since the last read.
- The Write Protection has blocked a Write access to a protected register.
and
- Software Reset has been performed while Write Protection was enabled.
and
- Write accesses have been detected on MR (while a chip select was active) or on CSRi
(while the Chip Select “i” was active) since the last read.
29
21
13
5
-
-
-
28
20
12
4
-
-
-
SPIWPVSRC
Violation Type
27
19
11
3
-
-
-
26
18
10
2
-
-
SPIWPVS
AT32UC3A3/A4
25
17
9
1
-
-
24
16
8
0
-
-
437