AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 511

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 24-9. Receiver Block Diagram
24.7.4
32072C–AVR32–2010/03
T ra n sm itte r
D ivid e r
R X _ C L O C K
C lo ck
C lo ck
Start
The transmitter and receiver can both be programmed to start their operations when an event
occurs, respectively in the Transmit Start Selection field of the TCMR register (TCMR.START)
and in the Receive Start Selection field of the RCMR register (RCMR.START).
Under the following conditions the start event is independently programmable:
A start can be programmed in the same manner on either side of the Transmit/Receive Clock
Mode Register (TCMR/RCMR). Thus, the start could be on TX_FRAME_SYNC (transmit) or
RX_FRAME_SYNC (receive).
Moreover, the receiver can start when data is detected in the bit stream with the compare func-
tions. See
Detection on TX_FRAME_SYNC input/output is done by the Transmit Frame Sync Output
Selection field in the TFMR register (TFMR.FSOS). Similarly, detection on RX_FRAME_SYNC
input/output is done by the Receive Frame Output Sync Selection field in the RFMR register
(RFMR.FSOS).
• Continuous: in this case, the transmission starts as soon as a word is written to the THR
• Synchronously with the transmitter/receiver
• On detection of a falling/rising edge on TX_FRAME_SYNC/RX_FRAME_SYNC
• On detection of a low/high level on TX_FRAME_SYNC/RX_FRAME_SYNC
• On detection of a level change or an edge on TX_FRAME_SYNC/RX_FRAME_SYNC
register and the reception starts as soon as the receiver is enabled
M U X
C K S
Section 24.7.6
C K O
for more details on receive compare modes.
C o n tro lle r
T ri-sta te
M U X
IN V
C K I
D a ta T ra n sfe r
C o n tro lle r
T ri-sta te
C K G
AT32UC3A3/A4
R e ce ive r
O u tp u t
C lo ck
C lo ck
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