AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 324

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 19-1.
19.9.1.2
19.9.1.3
32072C–AVR32–2010/03
Transfer Type
1) Single Block or
last transfer of
multi-Block
2) Auto Reload
multi-block transfer
with contiguous
SAR
3) Auto Reload
multi-block transfer
with contiguous
DAR
4) Auto Reload
multi-block transfer
5) Single Block or
last transfer of
multi-block
6) Linked List
multi-block transfer
with contiguous
SAR
7) Linked List
multi-block transfer
with auto-reload
SAR
8) Linked List
multi-block transfer
with contiguous
DAR
9) Linked List
multi-block transfer
with auto-reload
DAR
10) Linked List
multi-block transfer
Auto-reloading of Channel Registers
Contiguous Address Between Blocks
Programming of Transfer Types and Channel Register Update Method (DMACA State Machine Table)
LLP.
LOC
= 0
Yes
Yes
Yes
Yes
No
No
No
No
No
No
During auto-reloading, the channel registers are reloaded with their initial values at the comple-
tion of each block and the new values used for the new block. Depending on the row number in
Table 19-1 on page
reloaded from their initial value at the start of a block transfer.
In this case, the address between successive blocks is selected to be a continuation from the
end of the previous block. Enabling the source or destination address to be contiguous between
LLP_S_EN
(
CTLx)
0
0
0
0
0
0
0
1
1
1
RELOAD
_SR
(
CFGx)
0
0
1
1
0
0
1
0
0
0
324, some or all of the SARx, DARx and CTLx channel registers are
LLP_D_EN
(
CTLx)
0
0
0
0
0
1
1
0
0
1
RELOAD_
DS
(
CFGx)
0
1
0
1
0
0
0
0
1
0
CTLx,
LLPx
Update
Method
None, user
reprograms
CTLx,LLPx are
reloaded from
initial values.
CTLx,LLPx are
reloaded from
initial values.
CTLx,LLPx are
reloaded from
initial values.
None, user
reprograms
CTLx,LLPx
loaded from
next Linked List
item
CTLx,LLPx
loaded from
next Linked List
item
CTLx,LLPx
loaded from
next Linked List
item
CTLx,LLPx
loaded from
next Linked List
item
CTLx,LLPx
loaded from
next Linked List
item
SARx
Update
Method
None (single)
Contiguous
Auto-Reload
Auto-Reload
None (single)
Contiguous
Auto-Reload
Linked List
Linked List
Linked List
AT32UC3A3/A4
DARx
Update
Method
None
(single)
Auto-
Reload
Con-
tiguous
Auto-
Reload
None
(single)
Linked
List
Linked
List
Con-
tiguous
Auto-
Reload
Linked
List
Write
Back
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
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