AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 351

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

• DMS: Destination Master Select
Identifies the Master Interface layer where the destination device (peripheral or memory) resides
Table 19-5.
• TT_FC: Transfer Type and Flow Control
The four following transfer types are supported:
• Memory to Memory, Memory to Peripheral, Peripheral to Memory and Peripheral to Peripheral.
The DMACA is always the Flow Controller.
• DST_SCATTER_EN: Destination Scatter Enable
Scatter on the destination side is applicable only when the CTLx.DINC bit indicates an incrementing or decrementing
address control.
• SRC_GATHER_EN: Source Gather Enable
Gather on the source side is applicable only when the CTLx.SINC bit indicates an incrementing or decrementing address
control.
• SRC_MSIZE: Source Burst Transaction Length
Number of data items, each of width CTLx.SRC_TR_WIDTH, to be read from the source every time a source burst transac-
tion request is made from either the corresponding hardware or software handshaking interface.
32072C–AVR32–2010/03
DMS
0
1
Other
TT_FC
000
001
010
011
Other
SRC_MSIZE
0
1
2
0 = Scatter disabled
1 = Scatter enabled
0 = Gather disabled
1 = Gather enabled
Destination Master Select
HSB Master
HSB master 1
HSB master 2
Reserved
Transfer Type
Memory to Memory
Memory to Peripheral
Peripheral to Memory
Peripheral to Peripheral
Reserved
Size (items number)
1
4
8
Flow Controller
DMACA
DMACA
DMACA
DMACA
Reserved
AT32UC3A3/A4
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