AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 444

IC MCU 64KB FLASH 144LQFP

AT32UC3A364-ALUT

Manufacturer Part Number
AT32UC3A364-ALUT
Description
IC MCU 64KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3A364-ALUT

Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
110
Ram Memory Size
64KB
Cpu Speed
66MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A364-ALUT
Manufacturer:
Atmel
Quantity:
10 000
22.8.2.1
32072C–AVR32–2010/03
Bus Timing
A master is a device which starts and stops a transfer and generates the TWCK clock. A slave is
assigned an address and responds to requests from the master. These modes are described in
the following chapters.
Figure 22-5. Typical Application Block Diagram
The Timing Register (TR) is used to control the timing of bus signals driven by TWIS. TR
describes bus timings as a function of cycles of the prescaled CLK_TWIS. The clock prescaling
can be selected through TR.EXP.
TR has the following fields:
TLOWS: Prescaled clock cycles used to time SMBUS timeout T
TTOUT: Prescaled clock cycles used to time SMBUS timeout T
SUDAT: Non-prescaled clock cycles for data setup and hold count. Used to time T
EXP: Specifies the clock prescaler setting used for the SMBUS timeouts.
f
prescaled
Rp: Pull up value as given by the I²C Standard
Host with
Interface
TWI
=
f
-------------------------- -
2
CLK TWIS
(
TWD
TWCK
EXP
+ )
Serial EEPROM
1
Atmel TWI
)
Slave 1
I²C RTC
Slave 2
Controller
I²C LCD
Slave 3
TIMEOUT
LOW:SEXT
I²C Temp.
AT32UC3A3/A4
Sensor
Slave 4
.
.
Rp
SU_DAT
Rp
.
VDD
444

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