AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 284

IC MCU 64KB FLASH 144LQFP

AT32UC3A364-ALUT

Manufacturer Part Number
AT32UC3A364-ALUT
Description
IC MCU 64KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3A364-ALUT

Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
110
Ram Memory Size
64KB
Cpu Speed
66MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A364-ALUT
Manufacturer:
Atmel
Quantity:
10 000
18.7.3
Table 18-3.
18.7.4
Table 18-4.
Note:
32072C–AVR32–2010/03
Offset
0x80C
0x81C
0x82C
Offset
0x800
0x804
0x808
0x810
0x814
0x818
0x820
0x824
0x828
0x830
0x834
1. The reset values are device specific. Please refer to the Module Configuration section at the end of this chapter.
Performance Monitor Memory Map
Version Register Memory Map
PDCA Performance Monitor Registers
PDCA Version Register Memory Map
Note:
Performance Control Register
Channel0 Read Max Latency
Channel1 Read Max Latency
Channel0 Write Max Latency
Channel1 Write Max Latency
Channel0 Read Data Cycles
Channel0 Write Data Cycles
Channel1 Read Data Cycles
Channel1 Write Data Cycles
Channel0 Read Stall Cycles
Channel0 Write Stall Cycles
Channel1 Read Stall Cycles
Channel1 Write Stall Cycles
Version Register
1. The number of performance monitors is device specific. If the device has only one perfor-
Register
Register
mance monitor, the Channel1 registers are not available. Please refer to the Module
Configuration section at the end of this chapter for the number of performance monitors on this
device.
(1)
Register Name
Register Name
PCONTROL
PWSTALL0
PWSTALL1
PRSTALL0
PRSTALL1
PWDATA0
PWDATA1
VERSION
PRDATA0
PRDATA1
PWLAT0
PWLAT1
PRLAT0
PRLAT1
Read/Write
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Access
Access
AT32UC3A3/A4
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
Reset
-
(1)
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