AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 164

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.5
14.5.1
14.5.2
14.5.3
32072C–AVR32–2010/03
Product Dependencies
I/O Lines
Power Management
Clocks
In order to use this module, other parts of the system must be configured correctly, as described
below.
The pins used for interfacing the compliant external devices may be multiplexed with I/O Con-
troller lines. The user must first configure the I/O Controller to assign the EBI pins to their
peripheral functions.
To prevent bus errors EBI operation must be terminated before entering sleep mode.
A number of clocks can be selected as source for the EBI. The selected clock must be enabled
by the Power Manager.
The following clock sources are available:
• CLK_EBI
• CLK_SDRAMC
• CLK_SMC
Pin Name
ADDR[17]
NCS[4]
NCS[5]
NCS[2]
NCS[3]
NWE0
NWE1
NRD
NWE1-NBS1/
NWE0-NWE
NANDCS[0]
NANDCS[1]
ADDR[17]
CFNIORD
Alternate
CFCS[0]
CFCS[1]
CFNWE
CFNOE
NCS[4]
NCS[5]
NCS[2]
NCS[3]
DQM1/
Name
NRD
BA1
SMC/NAND Flash/SmartMedia shared lines
SDRAMC/SMC/CompactFlash shared lines
SMC/CompactFlash shared lines
SDRAMC Bank 1
SMCAddress Bus Line 17
SMC Read Signal
CompactFlash CFNOE
SMC Write Enable10 or Write enable
CompactFlash CFNWE
SMC Chip Select Line 4
CompactFlash Chip Select Line 0
SMC Chip Select Line 5
CompactFlash Chip Select Line 1
SMC Chip Select Line 2
NANDFlash/SmartMedia Chip Select Line
0
SMC Chip Select Line 3
NANDFlash/SmartMedia Chip Select Line
1
SDRAMC DQM1
SMC Write Enable1 or Byte Select 1
CompactFlash CFNIORD
Pin Description
AT32UC3A3/A4
Output
Output
Output
Output
Output
Output
Output
Output
Type
Active
Level
Low
Low
Low
Low
Low
Low
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