AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 631

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

26.3
32072C–AVR32–2010/03
Block Diagram
2368 of DPRAM, the user could for example use the configuration described
page 631
Table 26-2.
The USBB provides a hardware device to interface a USB link to a data flow stored in a dual-port
RAM (DPRAM).
The UTMI transceiver requires an external 12MHz clock as a reference to its internal 480MHz
PLL. The internal 480MHz PLL is used to clock an internal DLL module to recover the USB dif-
ferential data at 480Mbit/s.
Figure 26-1. USBB Block Diagram
HSB
PB
Pipe/Endpoint
0
1
2
3
.
Example of Configuration of Pipes/Endpoints Using the Whole DPRAM
Slave
Master
HSB Mux
Mnemonic
Master
Slave
PEP0
PEP1
PEP2
PEP3
User
Interface
512 bytes
512 bytes
256 bytes
64 bytes
Local HSB
HSB0
HSB1
Interface
Size
Slave
DMA
2.0 Core
USB
Nb. Banks
AT32UC3A3/A4
1
2
2
1
Controller
GCLK_USBB
OTG
UTMI
I/O
DPRAM
Allocation
PEP
inTable 26-2 on
USB_VBUS
USB_ID
USB_VBOF
DMFS
DPFS
DMHS
DPHS
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