AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 693

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

26.8.2
26.8.2.1
Register Name:
Access Type:
Offset:
Reset Value:
• OPMODE2: Specific Operational mode
• TSTPCKT: Test packet mode
• TSTK: Test mode K
• TSTJ: Test mode J
• LS: Low-Speed Mode Force
32072C–AVR32–2010/03
TSTPCKT
ADDEN
31
23
15
7
-
-
1: The UTMI transceiver is in the «disable bit stuffing and NRZI encoding» operational mode for test purpose.
0: The UTMI transceiver is in normal operation mode.
1: The UTMI transceiver generates test packets for test purpose.
0: The UTMI transceiver is in normal operation mode.
1: The UTMI transceiver generates high-speed K state for test purpose.
0: The UTMI transceiver is in normal operation mode.
1: The UTMI transceiver generates high-speed J state for test purpose.
0: The UTMI transceiver is in normal operation mode.
1: The low-speed mode is active.
0: The full-speed mode is active.
This bit can be written even if USBE is zero or FRZCLK is one. Disabling the USBB (by writing a zero to the USBE bit) does not
reset this bit.
USB Device Registers
Device General Control Register
TSTK
30
22
14
6
-
-
UDCON
Read/Write
0x0000
0x00000100
TSTJ
29
21
13
5
-
-
LS
28
20
12
4
-
-
UADD
27
19
11
3
-
-
SPDCONF
26
18
10
2
-
-
RMWKUP
AT32UC3A3/A4
25
17
9
1
-
-
OPMODE2
DETACH
24
16
8
0
-
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