AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 879

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

31.6.6
31.7
Table 31-2.
32072C–AVR32–2010/03
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
0x0018
0x001C
0x0020
0x0024
User Interface
Offset
OCD mode
MSI Register Memory Map
Register
Command register
Data register
Status register
System register
Interrupt Status register
Interrupt Status Clear register
Interrupt Enable register
Interrupt Disable register
Interrupt Mask register
Version register
DRQ interrupt request is cleared by reading (reception) or writing (transmission) FIFO, other
interrupt requests are cleared by writing 1 to the corresponding bit in Interrupt Status Clear Reg-
ister (ISCR).
There is no OCD mode for MSI.
CMD
DAT
SR
SYS
ISR
ISCR
IER
IDR
IMR
VERSION
Name
Read/Write
Read/Write
Read Only
Read/Write
Read Only
Write Only
Write Only
Write Only
Read Only
Read Only
Access
AT32UC3A3/A4
0x00000000
0x4C004C00
0x00001020
0x00004015
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000210
Reset State
879