AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 44

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

7.5.4.1
32072C–AVR32–2010/03
Osc0 clock
Osc1 clock
Enabling the PLL
PLLOSC
Figure 7-3.
PLLn is enabled by writing the PLLEN bit in the PLLn register. PLLOSC selects Oscillator 0 or 1
as clock source. The PLLMUL and PLLDIV bitfields must be written with the multiplication and
division factors, respectively, creating the voltage controlled ocillator frequency f
frequency f
if PLLDIV > 0
if PLLDIV = 0
Note:
If PLLOPT[1] field is set to 0:
If PLLOPT[1] field is set to 1:
0
1
f
f
f
f
f
f
IN
VCO
IN
VCO
PLL
PLL
Refer to Electrical Characteristics section for F
= f
= f
= f
= f
= (PLLMUL+1)/(PLLDIV) • f
= 2 • (PLLMUL+1) • f
Divider
PLL
OSC
OSC
PLLDIV
Input
VCO.
VCO
PLL with Control Logic and Filters
:
/2 • PLLDIV
/ 2
.
Fin
OSC
Divider
Output
PLLMUL
PLLOPT
PLLEN
PLL
OSC
IN
and F
VCO
frequency range.
Mask
AT32UC3A3/A4
LOCK
PLL clock
VCO
and the PLL
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