AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 582

IC MCU 64KB FLASH 144LQFP

AT32UC3A364-ALUT

Manufacturer Part Number
AT32UC3A364-ALUT
Description
IC MCU 64KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3A364-ALUT

Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Number Of I /o
110
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
96 KB
Interface Type
IrDA/SCI/SCIF/UDI
Maximum Clock Frequency
66 MHz
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Controller Family/series
AT32UC3A
No. Of I/o's
110
Ram Memory Size
64KB
Cpu Speed
66MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A364-ALUT
Manufacturer:
Atmel
Quantity:
10 000
25.6.9.5
Figure 25-39. Header Transmission
32072C–AVR32–2010/03
Baud Rate
TXRDY
LINIR
LINIR
Clock
Write
TXD
Header Transmission (Master Node Configuration)
ID
13 dominant bits (at 0)
All the LIN Frames start with a header which is sent by the master node and consists of a Synch
Break Field, Synch Field and Identifier Field.
So in Master node configuration, the frame handling starts with the sending of the header.
The header is transmitted as soon as the identifier is written in the LIN Identifier register (LINIR).
At this moment the flag TXRDY falls.
The Break Field, the Synch Field and the Identifier Field are sent automatically one after the
other.
The Break Field consists of 13 dominant bits and 1 recessive bit, the Synch Field is the charac-
ter 0x55 and the Identifier corresponds to the character written in the LIN Identifier Register
(LINIR). The Identifier parity bits can be automatically computed and sent (see
25.6.9.8).
The flag TXRDY rises when the identifier character is transferred into the Shift Register of the
transmitter.
Break Field
1 recessive bit
Delimiter
Break
(at 1)
Start
Bit
1
0
Synch Byte = 0x55
1
0
1
0
1
0
Stop
Bit
Start
Bit
ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7
AT32UC3A3/A4
Stop
Bit
Section
582

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