AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 508

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

24.7.1.3
32072C–AVR32–2010/03
Receiver clock management
be inverted independently by writing a one to the Transmit Clock Inversion bit in TCMR
(TCMR.CKI).
The transmitter can also drive the TX_CLOCK pin continuously or be limited to the actual data
transfer, depending on the Transmit Clock Output Mode Selection field in the TCMR register
(TCMR.CKO). The TCMR.CKI bit has no effect on the clock outputs.
Writing 0b10 to the TCMR.CKS field to select TX_CLOCK pin and 0b001 to the TCMR.CKO field
to select Continuous Transmit Clock can lead to unpredictable results.
Figure 24-6. Transmitter Clock Management
The receiver clock is generated from the transmitter clock, the divider clock, or an external clock
scanned on the RX_CLOCK pin. The receive clock is selected by writing to the Receive Clock
Selection field in the Receive Clock Mode Register (RCMR.CKS). The receive clock can be
inverted independently by writing a one to the Receive Clock Inversion bit in RCMR
(RCMR.CKI).
The receiver can also drive the RX_CLOCK pin continuously or be limited to the actual data
transfer, depending on the Receive Clock Output Mode Selection field in the RCMR register
(RCMR.CKO). The RCMR.CKI bit has no effect on the clock outputs.
Writing 0b10 to the RCMR.CKS field to select RX_CLOCK pin and 0b001 to the RCMR.CKO
field to select Continuous Receive Clock can lead to unpredictable results.
TX_CLOCK
Receiver
Divider
Clock
Clock
CKS
MUX
CKO
Controller
Tri-state
MUX
CKI
INV
Data Transfer
AT32UC3A3/A4
Controller
Tri-state
CKG
Transmitter
Output
Clock
Clock
508