AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 610

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

25.7.5
Name:
Access Type:
Offset:
Reset Value:
For backward compatibility the MANE bit has been duplicated to the MANEA bit position. Reading either one or the other
has the same effect.
25.7.6
Name:
Access Type:
Offset:
Reset Value:
•
32072C–AVR32–2010/03
LINSNRE: LIN Slave Not Responding Error
LINTC
LINTC
PARE
PARE
CTS
31
23
15
31
23
15
–
–
7
–
7
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
A bit in this register is cleared when the corresponding bit in IDR is written to one.
A bit in this register is set when the corresponding bit in IER is written to one.
0: No LIN Slave Not Responding Error has been detected since the last RSTSTA.
Interrupt Mask Register
Channel Status Register
FRAME
FRAME
LINID
LINID
DCD
30
22
14
30
22
14
IMR
Read-only
0x10
-
–
–
6
CSR
Read-only
0x14
-
–
6
NACK/LINBK
NACK/LINBK
LINSNRE
LINSNRE
OVRE
OVRE
DSR
29
21
13
29
21
13
–
5
5
RXBUFF
RXBUFF
LINCE
MANE
LINCE
28
20
12
28
20
12
RI
4
–
4
–
LINIPE
LINIPE
CTSIC
CTSIC
27
19
11
27
19
11
–
–
3
–
3
–
ITER/UNRE
ITER/UNRE
LINISFE
LINISFE
RXBRK
RXBRK
DCDIC
DCDIC
26
18
10
26
18
10
2
2
AT32UC3A3/A4
TXEMPTY
TXEMPTY
TXRDY
TXRDY
DSRIC
DSRIC
LINBE
LINBE
25
17
25
17
9
1
9
1
TIMEOUT
TIMEOUT
MANERR
MANEA
RXRDY
RXRDY
RIIC
RIIC
24
16
24
16
8
0
8
0
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