AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 657

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

26.7.3
26.7.3.1
26.7.3.2
32072C–AVR32–2010/03
USB Host Operation
Description of pipes
Power-On and reset
For the USBB in host mode, the term “pipe” is used instead of “endpoint” (used in device mode).
A host pipe corresponds to a device endpoint, as described by the
from the USB specification.
Figure 26-21. USB Communication Flow
In host mode, the USBB associates a pipe to a device endpoint, considering the device configu-
ration descriptors.
Figure 26-22 on page 657
Figure 26-22. Host Mode States
After a hardware reset, the USBB host mode is in the Reset state.
When the USBB is enabled (USBE is one) in host mode (ID is zero), its host mode state goes to
the Idle state. In this state, the controller waits for device connection with minimal power con-
describes the USBB host mode main states.
Clock stopped
Ready
Macro off
Device
Connection
SOFE = 1
Device
Disconnection
SOFE = 0
Idle
Suspend
Device
Disconnection
<any
other
state>
AT32UC3A3/A4
Figure 26-21 on page 657
657