AT32UC3A364-ALUT Atmel, AT32UC3A364-ALUT Datasheet - Page 826

• Manufacturer Part Number: AT32UC3A364-ALUT
• Description: IC MCU 64KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A364-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, WDT
• Number Of I /o: 110
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 96 KB
• Interface Type: IrDA/SCI/SCIF/UDI
• Maximum Clock Frequency: 66 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 110
• Ram Memory Size: 64KB
• Cpu Speed: 66MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: ATEVK1104 - KIT DEV/EVAL FOR AVR32 AT32UC3AATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

30.4
Table 30-1.
1.
30.5
30.5.1
30.5.2
30.5.3
30.5.4
30.6
30.6.1
32072C–AVR32–2010/03
Pin Name
CMD[1:0]
CLK
DATA[7:0]
DATA[15:8]
I/O Lines Description
PP: Push/Pull, OD: Open Drain
Product Dependencies
Functional Description
Power Management
I/O Lines
Clocks
Interrupt
Bus Topology
I/O Lines Description
In order to use this module, other parts of the system must be configured correctly, as described
below.
If the CPU enters a sleep mode that disables clocks used by the MCI, the MCI will stop function-
ing and resume operation after the system wakes up from sleep mode.
The pins used for interfacing the MultiMedia Cards or SD Cards may be multiplexed with GPIO
lines. User must first program the I/O controller to assign the peripheral functions to MCI pins.
The clock for the MCI bus interface (CLK_MCI) is generated by the Power Manager. This clock
is enabled at reset, and can be disabled in the Power Manager. It is recommended to disable the
MCI before disabling the clock, to avoid freezing the MCI in an undefined state.
The MCI interrupt request line is connected to the interrupt controller. Using the MCI interrupt
requires the interrupt controller to be programmed first.
Figure 30-3. Multimedia Memory Card Bus Topology
Command/Response
Clock
Data 0..7 of Slot A
Data 0..7 of Slot B
Pin Description
Type
Input/Output/
PP/OD
Input/Output
Input/Output/PP
Input/Output/PP
(1)
910
1 2 3 4 5 6
MMC
1213 8
Comments
CMD of a MMC or SDCard/SDIO
CLK of a MMC or SD Card/SDIO
DAT[0..7] of a MMC
DAT[0..3] of a SD Card/SDIO
DAT[0..7] of a MMC
DAT[0..3] of a SD Card/SDIO
7
AT32UC3A3/A4
826