DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 82
![IC H8S/2100 MCU FLASH 80QFP](/photos/12/21/122132/df2134afa20v_sml.jpg)
DF2134AFA20V
Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2134AFA20V.pdf
(1063 pages)
Specifications of DF2134AFA20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 82 of 1063
- Download datasheet (6Mb)
Section 2 CPU
2.1.2
The differences between the H8S/2600 CPU and the H8S/2000 CPU are shown below.
There are also differences in the address space, EXR register functions, power-down state, etc.,
depending on the product.
Rev. 4.00 Jun 06, 2006 page 26 of 1004
REJ09B0301-0400
High-speed operation
All frequently-used instructions execute in one or two states
Two CPU operating modes
Power-down state
Register configuration
The MAC register is supported only by the H8S/2600 CPU.
Basic instructions
The four instructions MAC, CLRMAC, LDMAC, and STMAC are supported only by the
H8S/2600 CPU.
Number of execution states
The number of execution states of the MULXU and MULXS instructions differ as follows.
Instruction
MULXU
MULXS
Maximum clock rate:
8/16/32-bit register-register add/subtract: 50 ns
8
16 ÷ 8-bit register-register divide:
16
32 ÷ 16-bit register-register divide:
Normal mode
Advanced mode
Transition to power-down state by SLEEP instruction
CPU clock speed selection
Differences between H8S/2600 CPU and H8S/2000 CPU
8-bit register-register multiply:
16-bit register-register multiply:
Mnemonic
MULXU.B Rs, Rd
MULXU.W Rs, ERd
MULXS.B Rs, Rd
MULXS.W Rs, ERd
20 MHz
600 ns
600 ns
1000 ns
1000 ns
H8S/2600
3
4
4
5
Number of Execution States
H8S/2000
13
12
20
21
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