DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 168

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 5 Interrupt Controller
5.2.8
BAR consists of three 8-bit readable/writable registers (BARA, BARB, and BARC), and is used to
specify the address at which an address break is to be executed.
Each of the BAR registers is initialized to H'00 by a reset and in hardware standby mode. They are
not initialized in software standby mode.
BARA Bits 7 to 0—Address 23 to 16 (A23 to A16)
BARB Bits 7 to 0—Address 15 to 8 (A15 to A8)
BARC Bits 7 to 1—Address 7 to 1 (A7 to A1)
These bits specify the address at which an address break is to be executed. BAR bits A15 to A1
are compared with internal address bus lines A15 to A1, respectively.
The address at which the first instruction byte is located should be specified as the break address.
Occurrence of the address break condition may not be recognized for other addresses.
In normal mode, no comparison is made with address lines A23 to A16.
BARC Bit 0—Reserved: This bit cannot be modified and is always read as 0.
Rev. 4.00 Jun 06, 2006 page 112 of 1004
REJ09B0301-0400
Bit
BARA
Initial value
Read/Write
Bit
BARB
Initial value
Read/Write
Bit
BARC
Initial value
Read/Write
Break Address Registers A, B, C (BARA, BARB, BARC)
R/W
R/W
R/W
A23
A15
A7
7
0
7
0
7
0
R/W
R/W
R/W
A22
A14
A6
6
0
6
0
6
0
R/W
R/W
R/W
A21
A13
A5
5
0
5
0
5
0
R/W
R/W
R/W
A20
A12
A4
4
0
4
0
4
0
R/W
R/W
R/W
A19
A11
A3
3
0
3
0
3
0
R/W
R/W
R/W
A18
A10
A2
2
0
2
0
2
0
R/W
R/W
R/W
A17
A9
A1
1
0
1
0
1
0
R/W
R/W
A16
A8
—
—
0
0
0
0
0
0