DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 164

IC H8S/2100 MCU FLASH 80QFP

DF2134AFA20V

Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2134AFA20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 5 Interrupt Controller
Bit n
IRQnF
0
1
Note:
Rev. 4.00 Jun 06, 2006 page 108 of 1004
REJ09B0301-0400
* When a product, in which a DTC is incorporated, is used in the following settings, the
(1) When DTCEA3 is set to 1 (ADI is set to an interrupt source), IRQ4F flag is not
(2) When DTCEA2 is set to 1 (ICIA is set to an interrupt source), IRQ5F flag is not
(3) When DTCEA1 is set to 1 (ICIB is set to an interrupt source), IRQ6F flag is not
(4) When DTCEA0 is set to 1 (OCIA is set to an interrupt source), IRQ7F flag is not
Description
[Clearing conditions]
[Setting conditions]
corresponding flag bit is not automatically cleared even when exception handling, which
is a clear condition, is executed and the bit is held at 1.
automatically cleared.
automatically cleared.
automatically cleared.
automatically cleared.
When activation interrupt sources of DTC and IRQ interrupts are used with the above
combinations, clear the interrupt flag by software in the interrupt handling routine of the
corresponding IRQ.
Cleared by reading IRQnF when set to 1, then writing 0 in IRQnF
When interrupt exception handling is executed when low-level detection is set
(IRQnSCB = IRQnSCA = 0) and IRQn input is high *
When IRQn interrupt exception handling is executed when falling, rising, or both-
edge detection is set (IRQnSCB = 1 or IRQnSCA = 1) *
When IRQn input goes low when low-level detection is set (IRQnSCB = IRQnSCA =
0)
When a falling edge occurs in IRQn input when falling edge detection is set
(IRQnSCB = 0, IRQnSCA = 1)
When a rising edge occurs in IRQn input when rising edge detection is set
(IRQnSCB = 1, IRQnSCA = 0)
When a falling or rising edge occurs in IRQn input when both-edge detection is set
(IRQnSCB = IRQnSCA = 1)
(Initial value)
(n = 7 to 0)

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