DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 613
![IC H8S/2100 MCU FLASH 80QFP](/photos/12/21/122132/df2134afa20v_sml.jpg)
DF2134AFA20V
Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2134AFA20V.pdf
(1063 pages)
Specifications of DF2134AFA20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 613 of 1063
- Download datasheet (6Mb)
Bit 5—A/D Start (ADST): Selects starting or stopping of A/D conversion. Holds a value of 1
during A/D conversion.
The ADST bit can be set to 1 by software, a timer conversion start trigger, or the A/D external
trigger input pin (ADTRG).
Bit 4—Scan Mode (SCAN): Selects single mode or scan mode as the A/D conversion operating
mode. See section 19.4, Operation, for single mode and scan mode operation. Only set the SCAN
bit while conversion is stopped.
Bit 3—Clock Select (CKS): Sets the A/D conversion time. Only change the conversion time
while ADST = 0.
Bit 5
ADST
0
1
Bit 4
SCAN
0
1
Bit 3
CKS
0
1
Description
A/D conversion stopped
Single mode: A/D conversion is started. Cleared to 0 automatically when conversion
Scan mode: A/D conversion is started. Conversion continues sequentially on the
Description
Single mode
Scan mode
Description
Conversion time = 266 states (max.)
Conversion time = 134 states (max.)
on the specified channel ends
selected channels until ADST is cleared to 0 by software, a reset, or a
transition to standby mode or module stop mode
Rev. 4.00 Jun 06, 2006 page 557 of 1004
Section 19 A/D Converter
REJ09B0301-0400
(Initial value)
(Initial value)
(Initial value)
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