DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 361

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.1
The H8S/2138 Group and H8S/2134 Group include an 8-bit timer module with two channels
(TMR0 and TMR1). Each channel has an 8-bit counter (TCNT) and two time constant registers
(TCORA and TCORB) that are constantly compared with the TCNT value to detect compare-
matches. The 8-bit timer module can be used as a multifunction timer in a variety of applications,
such as generation of a rectangular-wave output with an arbitrary duty cycle.
The H8S/2138 Group also has two similar 8-bit timer channels (TMRX and TMRY). These
channels can be used in a connected configuration using the timer connection function. TMRX
and TMRY have greater input/output and interrupt function related restrictions than TMR0 and
TMR1.
TMRX has a built-in H8S/2138, but does not have a built-in H8S/2134.
12.1.1
Selection of clock sources
Selection of three ways to clear the counters
Timer output controlled by two compare-match signals
Cascading of the two channels (TMR0, TMR1)
TMR0, TMR1: The counter input clock can be selected from six internal clocks and an
external clock (enabling use as an external event counter).
TMRX, TMRY: The counter input clock can be selected from three internal clocks and an
external clock (enabling use as an external event counter).
The counters can be cleared on compare-match A or B, or by an external reset signal.
The timer output signal in each channel is controlled by two independent compare-match
signals, enabling the timer to be used for various applications, such as the generation of
pulse output or PWM output with an arbitrary duty cycle.
(Note: TMRY does not have a timer output pin.)
Operation as a 16-bit timer can be performed using channel 0 as the upper half and channel
1 as the lower half (16-bit count mode).
Channel 1 can be used to count channel 0 compare-match occurrences (compare-match
count mode).
Overview
Features
Section 12 8-Bit Timers
Rev. 4.00 Jun 06, 2006 page 305 of 1004
Section 12 8-Bit Timers
REJ09B0301-0400