DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 454

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 15 Serial Communication Interface (SCI, IrDA)
Bit 7—Transmit Interrupt Enable (TIE): Enables or disables transmit-data-empty interrupt
(TXI) request generation when serial transmit data is transferred from TDR to TSR and the TDRE
flag in SSR is set to 1.
Bit 7
TIE
0
1
Note:
Bit 6—Receive Interrupt Enable (RIE): Enables or disables receive-data-full interrupt (RXI)
request and receive-error interrupt (ERI) request generation when serial receive data is transferred
from RSR to RDR and the RDRF flag in SSR is set to 1.
Bit 6
RIE
0
1
Note:
Bit 5—Transmit Enable (TE): Enables or disables the start of serial transmission by the SCI.
Bit 5
TE
0
1
Notes: 1. The TDRE flag in SSR is fixed at 1.
Rev. 4.00 Jun 06, 2006 page 398 of 1004
REJ09B0301-0400
* TXI interrupt request cancellation can be performed by reading 1 from the TDRE flag,
* RXI and ERI interrupt request cancellation can be performed by reading 1 from the
2. In this state, serial transmission is started when transmit data is written to TDR and the
then clearing it to 0, or clearing the TIE bit to 0.
RDRF, FER, PER, or ORER flag, then clearing the flag to 0, or clearing the RIE bit to 0.
TDRE flag in SSR is cleared to 0.
SMR setting must be performed to decide the transmission format before setting the TE
bit to 1.
Description
Transmit-data-empty interrupt (TXI) request disabled *
Transmit-data-empty interrupt (TXI) request enabled
Description
Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI) request
disabled *
Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI) request
enabled
Description
Transmission disabled *
Transmission enabled *
2
1
(Initial value)
(Initial value)
(Initial value)