DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 713

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 22.11 Settings for Each Operating Mode in Programmer Mode
Notes: 1. Chip disable is not a standby state; internally, it is an operation state.
Table 22.12 Programmer Mode Commands
Notes: 1. In auto-program mode. 129 cycles are required for command writing by a simultaneous
22.10.4 Memory Read Mode
Mode
Read
Output disable
Command write
Chip disable *
Command Name
Memory read mode
Auto-program mode
Auto-erase mode
Status read mode
After the end of an auto-program, auto-erase, or status read operation, the command wait state
is entered. To read memory contents, a transition must be made to memory read mode by
means of a command write before the read is executed.
Command writes can be performed in memory read mode, just as in the command wait state.
Once memory read mode has been entered, consecutive reads can be performed.
After power-on, memory read mode is entered.
2. Ain indicates that there is also address input in auto-program mode.
2. In memory read mode, the number of cycles depends on the number of address write
128-byte write.
cycles (n).
1
Section 22 ROM
CE
CE
L
L
L
H
CE
CE
Number
of Cycles
1 + n
129
2
2
(H8S/2138 F-ZTAT A-Mask Version, H8S/2134 F-ZTAT A-Mask Version)
OE
OE
OE
OE
L
H
H
X
Mode
Write
Write
Write
Write
1st Cycle
Address Data
X
X
X
X
WE
WE
WE
WE
H
H
L
X
Pin Names
Rev. 4.00 Jun 06, 2006 page 657 of 1004
H'00
H'40
H'20
H'71
FO7 to FO0
Data output
Hi-Z
Data input
Hi-Z
Mode
Read
Write
Write
Write
2nd Cycle
Address Data
RA
WA
X
X
REJ09B0301-0400
FA17 to FA0
Ain *
X
Ain *
X
2
2
Dout
Din
H'20
H'71