DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 356

IC H8S/2100 MCU FLASH 80QFP

DF2134AFA20V

Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2134AFA20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 11 16-Bit Free-Running Timer
Contention between OCR Write and Compare-Match: If a compare-match occurs during the
state after an OCRA or OCRB write cycle, the write takes priority and the compare-match signal
is inhibited.
Figure 11.20 shows this type of contention.
If automatic addition of OCRAR/OCRAF to OCRA is selected, and a compare-match occurs in
the cycle following the OCRA, OCRAR and OCRAF write cycle, the OCRA, OCRAR and
OCRAF write takes priority and the compare-match signal is inhibited. Consequently, the result of
the automatic addition is not written to OCRA.
Figure 11.21 shows this type of contention.
Rev. 4.00 Jun 06, 2006 page 300 of 1004
REJ09B0301-0400
Figure 11.20 Contention between OCR Write and Compare-Match
Address
Internal write signal
FRC
OCR
Compare-match
signal
(When Automatic Addition Function Is Not Used)
OCRA or OCRB write cycle
T
OCR address
1
N
N
T
2
Write data
M
Inhibited
N + 1

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