DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 498

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 15 Serial Communication Interface (SCI, IrDA)
In serial transmission, the SCI operates as described below.
1. The SCI monitors the TDRE flag in SSR, and if it is 0, recognizes that data has been written to
2. After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts
3. The SCI checks the TDRE flag at the timing for sending the MSB (bit 7).
4. After completion of serial transmission, the SCK pin is held in a constant state.
Figure 15.17 shows an example of SCI operation in transmission.
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TDR, and transfers the data from TDR to TSR.
transmission. If the TIE bit is set to 1 at this time, a transmit-data-empty interrupt (TXI) is
generated.
When clock output mode has been set, the SCI outputs 8 serial clock pulses. When use of an
external clock has been specified, data is output synchronized with the input clock.
The serial transmit data is sent from the TxD pin starting with the LSB (bit 0) and ending with
the MSB (bit 7).
If the TDRE flag is cleared to 0, data is transferred from TDR to TSR, and serial transmission
of the next frame is started.
If the TDRE flag is set to 1, the TEND flag in SSR is set to 1, the MSB (bit 7) is sent, and the
TxD pin maintains its state.
If the TEIE bit in SCR is set to 1 at this time, a transmit-end interrupt (TEI) request is
generated.