DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 556

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 16 I
16.3.9
The logic levels at the SCL and SDA pins are routed through noise cancelers before being latched
internally. Figure 16.13 shows a block diagram of the noise canceler circuit.
The noise canceler consists of two cascaded latches and a match detector. The SCL (or SDA)
input signal is sampled on the system clock, but is not passed forward to the next circuit unless the
outputs of both latches agree. If they do not agree, the previous value is held.
16.3.10 Sample Flowcharts
Figures 16.14 to 16.17 show sample flowcharts for using the I
Rev. 4.00 Jun 06, 2006 page 500 of 1004
REJ09B0301-0400
SCL or
SDA input
signal
Sampling
clock
Noise Canceler
2
C Bus Interface [H8S/2138 Group Option]
D
Sampling clock
System clock
period
Latch
Figure 16.13 Block Diagram of Noise Canceler
C
Q
D
Latch
C
Q
2
C bus interface in each mode.
detector
Match
Internal
SCL or
SDA
signal