DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 59
![IC H8S/2100 MCU FLASH 80QFP](/photos/12/21/122132/df2134afa20v_sml.jpg)
DF2134AFA20V
Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2134AFA20V.pdf
(1063 pages)
Specifications of DF2134AFA20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 59 of 1063
- Download datasheet (6Mb)
Item
Bus controller
Data transfer
controller (DTC)
(H8S/2138 Group)
16-bit free-running
timer module
(FRT: 1 channel)
8-bit timer module
(2 channels: TMR0,
TMR1)
Timer connection
and 8-bit timer (TMR)
module (2 channels:
TMRX, TMRY)
(Timer connection
and TMRX provided
in H8S/2138 Group)
Watchdog timer
module
(WDT: 2 channels)
8-bit PWM timer
(PWM)
(H8S/2138 Group)
Specifications
Each channel has:
Input/output and FRT, TMR1, TMRX, TMRY can be interconnected
2-state or 3-state access space can be designated for external
expansion areas
Number of program wait states can be set for external expansion areas
Can be activated by internal interrupt or software
Multiple transfers or multiple types of transfer possible for one
activation source
Transfer possible in repeat mode, block transfer mode, etc.
Request can be sent to CPU for interrupt that activated DTC
One 16-bit free-running counter (also usable for external event
counting)
Two output compare outputs
Four input capture inputs (with buffer operation capability)
One 8-bit up-counter (also usable for external event counting)
Two time constant registers
The two channels can be connected
Measurement of input signal or frequency-divided waveform pulse
width and cycle (FRT, TMR1)
Output of waveform obtained by modification of input signal edge (FRT,
TMR1)
Determination of input signal duty cycle (TMRX)
Output of waveform synchronized with input signal (FRT, TMRX,
TMRY)
Automatic generation of cyclical waveform (FRT, TMRY)
Watchdog timer or interval timer function selectable
Subclock operation capability (channel 1 only)
Up to 16 outputs
Pulse duty cycle settable from 0 to 100%
Resolution: 1/256
1.25 MHz maximum carrier frequency (20-MHz operation)
Rev. 4.00 Jun 06, 2006 page 3 of 1004
Section 1 Overview
REJ09B0301-0400
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