DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 524

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 16 I
Bit 2
BC2
0
1
16.2.5
ICCR is an 8-bit readable/writable register that enables or disables the I
disables interrupts, selects master or slave mode and transmission or reception, enables or disables
acknowledgement, confirms the I
performs interrupt flag confirmation.
ICCR is initialized to H'01 by a reset and in hardware standby mode.
Bit 7—I
used. When ICE is set to 1, port pins function as SCL and SDA input/output pins and transfer
operations are enabled. When ICE is cleared to 0, the I
internal state is cleared.
The SAR and SARX registers can be accessed when ICE is 0. The ICMR and ICDR registers can
be accessed when ICE is 1.
Rev. 4.00 Jun 06, 2006 page 468 of 1004
REJ09B0301-0400
Bit
Initial value
Read/Write
Note: * Only 0 can be written, to clear the flag.
2
C Bus Interface Enable (ICE): Selects whether or not the I
I
Bit 1
BC1
0
1
0
1
2
C Bus Control Register (ICCR)
2
C Bus Interface [H8S/2138 Group Option]
R/W
ICE
Bit 0
BC0
0
1
0
1
0
1
0
1
7
0
IEIC
R/W
6
0
Synchronous Serial Format
8
1
2
3
4
5
6
7
2
C bus interface bus status, issues start/stop conditions, and
MST
R/W
5
0
TRS
R/W
4
0
2
C bus interface module is disabled and the
ACKE
R/W
Bits/Frame
3
0
I
9
2
3
4
5
6
7
8
2
C Bus Format
BBSY
R/W
2
C bus interface is to be
2
0
2
C bus interface, enables or
R/(W) *
IRIC
1
0
(Initial value)
SCP
W
0
1