DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 341
![IC H8S/2100 MCU FLASH 80QFP](/photos/12/21/122132/df2134afa20v_sml.jpg)
DF2134AFA20V
Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2134AFA20V.pdf
(1063 pages)
Specifications of DF2134AFA20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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- Download datasheet (6Mb)
Bit 4—Output Compare Register Select (OCRS): OCRA and OCRB share the same address.
When this address is accessed, the OCRS bit selects which register is accessed. This bit does not
affect the operation of OCRA or OCRB.
Bit 3—Output Enable A (OEA): Enables or disables output of the output compare A signal
(FTOA).
Bit 2—Output Enable B (OEB): Enables or disables output of the output compare B signal
(FTOB).
Bit 1—Output Level A (OLVLA): Selects the logic level to be output at the FTOA pin in
response to compare-match A (signal indicating a match between the FRC and OCRA values).
When the OCRAMS bit is 1, this bit is ignored.
Bit 5
ICRS
0
1
Bit 4
OCRS
0
1
Bit 3
OEA
0
1
Bit 2
OEB
0
1
Description
The ICRA, ICRB, and ICRC registers are selected
The OCRAR, OCRAF, and OCRDM registers are selected
Description
The OCRA register is selected
The OCRB register is selected
Description
Output compare A output is disabled
Output compare A output is enabled
Description
Output compare B output is disabled
Output compare B output is enabled
Rev. 4.00 Jun 06, 2006 page 285 of 1004
Section 11 16-Bit Free-Running Timer
REJ09B0301-0400
(Initial value)
(Initial value)
(Initial value)
(Initial value)
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