DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 605

IC H8S/2100 MCU FLASH 80QFP

DF2134AFA20V

Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2134AFA20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
18.3
The D/A converter module has two on-chip D/A converter circuits that can operate independently.
D/A conversion is performed continuously whenever enabled by the D/A control register (DACR).
When a new value is written in DADR0 or DADR1, conversion of the new value begins
immediately. The converted result is output by setting the DAOE0 or DAOE1 bit to 1.
An example of conversion on channel 0 is given next. Figure 18.2 shows the timing.
Address
DADR0
DAOE0
DA0
Legend:
t
DCONV
Software writes the data to be converted in DADR0.
D/A conversion begins when the DAOE0 bit in DACR is set to 1. After the elapse of the
conversion time, analog output appears at the DA0 pin. Output of the converted result begins
after the conversion time. The output value is AVcc
This output continues until a new value is written in DADR0 or the DAOE0 bit is cleared to 0.
If a new value is written in DADR0, conversion begins immediately. Output of the converted
result begins after the conversion time.
When the DAOE0 bit is cleared to 0, DA0 becomes an input pin.
: D/A conversion time
Operation
DADR0
write cycle
High-impedance state
Figure 18.2 D/A Conversion (Example)
DACR
write cycle
Conversion data (1)
t
DCONV
Conversion result (1)
Rev. 4.00 Jun 06, 2006 page 549 of 1004
(DADR value)/256.
DADR0
write cycle
t
Section 18 D/A Converter
DCONV
Conversion data (2)
Conversion result (2)
REJ09B0301-0400
DACR
write cycle

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