DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 569
![IC H8S/2100 MCU FLASH 80QFP](/photos/12/21/122132/df2134afa20v_sml.jpg)
DF2134AFA20V
Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.DF2134AFA20V.pdf
(1063 pages)
Specifications of DF2134AFA20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 569 of 1063
- Download datasheet (6Mb)
Note on I
If the rise time of the 9th SCL clock exceeds the specification because the bus load capacitance
is large, or if there is a slave devices of the type that drives SCL low to effect a wait, after
rising of the 9th SCL clock, issue the stop condition after reading SCL and determining it to be
low, as shown below.
SDA
IRIC
SCL
2
C Bus Interface Stop Condition Instruction Issuance
VIH
9th clock
Figure 16.20 Timing of Stop Condition Issuance
As waveform rise is late,
SCL is detected as low
High period secured
Section 16 I
[1] Determination of SCL=Low
Rev. 4.00 Jun 06, 2006 page 513 of 1004
2
C Bus Interface [H8S/2138 Group Option]
[2] Stop condition instruction issuance
Stop condition generation
REJ09B0301-0400
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