DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 650

IC H8S/2100 MCU FLASH 80QFP

DF2134AFA20V

Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2134AFA20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 21 ROM
21.6.1
When boot mode is used, the flash memory programming control program must be prepared in the
host beforehand. The channel 1 SCI to be used is set to asynchronous mode.
When a reset-start is executed after the H8S/2138 or H8S/2134 Group MCU’s pins have been set
to boot mode, the boot program built into the MCU is started and the programming control
program prepared in the host is serially transmitted to the MCU via the SCI. In the MCU, the
programming control program received via the SCI is written into the programming control
program area in on-chip RAM. After the transfer is completed, control branches to the start
address of the programming control program area and the programming control program execution
state is entered (flash memory programming is performed).
The transferred programming control program must therefore include coding that follows the
programming algorithm given later.
The system configuration in boot mode is shown in figure 21.7, and the boot program mode
execution procedure in figure 21.8.
Rev. 4.00 Jun 06, 2006 page 594 of 1004
REJ09B0301-0400
Boot Mode
Host
(Mask ROM Version, H8S/2138 F-ZTAT, H8S/2134 F-ZTAT, and H8S/2132 F-ZTAT)
Figure 21.7 System Configuration in Boot Mode
Verify data transmission
Write data reception
RxD1
TxD1
SCI1
The chip
Flash memory
On-chip RAM

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