DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 302

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 8-Bit PWM Timers [H8S/2138 Group]
9.2.2
Each PWDR is an 8-bit readable/writable register that specifies the duty cycle of the basic pulse to
be output, and the number of additional pulses. The value set in PWDR corresponds to a 0 or 1
ratio in the conversion period. The upper 4 bits specify the duty cycle of the basic pulse as 0/16 to
15/16 with a resolution of 1/16. The lower 4 bits specify how many extra pulses are to be added
within the conversion period comprising 16 basic pulses. Thus, a specification of 0/256 to 255/256
is possible for 0/1 ratios within the conversion period. For 256/256 (100%) output, port output
should be used.
PWDR is initialized to H'00 by a reset, and in the standby modes, watch mode, subactive mode,
subsleep mode, and module stop mode.
9.2.3
Each PWDPR is an 8-bit readable/writable register that controls the polarity of the PWM output.
Bits OS0 to OS15 correspond to outputs PW0 to PW15.
Rev. 4.00 Jun 06, 2006 page 246 of 1004
REJ09B0301-0400
Bit
Initial value
Read/Write
PWDPRA
Bit
Initial value
Read/Write
PWDPRB
Bit
Initial value
Read/Write
PWM Data Registers (PWDR0 to PWDR15)
PWM Data Polarity Registers A and B (PWDPRA and PWDPRB)
OS15
R/W
OS7
R/W
R/W
7
0
7
0
7
0
OS14
OS6
R/W
R/W
R/W
6
0
6
0
6
0
OS13
R/W
OS5
R/W
R/W
5
0
5
0
5
0
OS12
OS4
R/W
R/W
R/W
4
0
4
0
4
0
OS11
R/W
OS3
R/W
R/W
3
0
3
0
3
0
OS10
R/W
OS2
R/W
R/W
2
0
2
0
2
0
OS1
OS9
R/W
R/W
R/W
1
0
1
0
1
0
OS0
OS8
R/W
R/W
R/W
0
0
0
0
0
0