DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 624

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 A/D Converter
19.6
The following points should be noted when using the A/D converter.
Setting Range of Analog Power Supply and Other Pins:
1. Analog input voltage range
2. Digital input voltage range
3. Relation between AV
If conditions 1 to 3 above are not met, the reliability of the device may be adversely affected.
Notes on Board Design: In board design, digital circuitry and analog circuitry should be as
mutually isolated as possible, and layout in which digital circuit signal lines and analog circuit
signal lines cross or are in close proximity should be avoided as far as possible. Failure to do so
may result in incorrect operation of the analog circuitry due to inductance, adversely affecting A/D
conversion values.
Also, digital circuitry must be isolated from the analog input signals (AN0 to AN7), and analog
power supply (AVCC) by the analog ground (AVSS). Also, the analog ground (AVSS) should be
connected at one point to a stable digital ground (VSS) on the board.
Notes on Noise Countermeasures: A protection circuit connected to prevent damage due to an
abnormal voltage such as an excessive surge at the analog input pins (AN0 to AN7) should be
connected between AVCC and AVSS as shown in figure 19.7.
Also, the bypass capacitors connected to AVCC and the filter capacitor connected to AN0 to AN7
must be connected to AVSS.
If a filter capacitor is connected as shown in figure 19.7, the input currents at the analog input pins
(AN0 to AN7) are averaged, and so an error may arise. Also, when A/D conversion is performed
frequently, as in scan mode, if the current charged and discharged by the capacitance of the
sample-and-hold circuit in the A/D converter exceeds the current input via the input impedance
Rev. 4.00 Jun 06, 2006 page 568 of 1004
REJ09B0301-0400
The voltage applied to the ANn analog input pins during A/D conversion should be in the
range AV
The voltage applied to the CINn digital input pins should be in the range AV
and V
As the relationship between AV
not used, the AVCC and AVSS pins must on no account be left open.
SS
Usage Notes
SS
CINn
ANn
V
CC
AV
CC
(n = 0 to 7).
, AV
CC
(n = 0 to 7).
SS
and V
CC
, AV
CC
, V
SS
and V
SS
CC
, V
SS
, set AV
SS
= V
SS
. If the A/D converter is
SS
CINn
AV
CC