DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 20

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.9
2.10 Usage Note........................................................................................................................ 70
Section 3 MCU Operating Modes
3.1
3.2
3.3
3.4
3.5
Section 4 Exception Handling
4.1
4.2
4.3
4.4
4.5
4.6
Rev. 4.00 Jun 06, 2006 page xviii of liv
2.8.5
2.8.6
Basic Timing ..................................................................................................................... 66
2.9.1
2.9.2
2.9.3
2.9.4
2.10.1 TAS Instruction.................................................................................................... 70
2.10.2 STM/LDM Instruction ......................................................................................... 70
Overview........................................................................................................................... 71
3.1.1
3.1.2
Register Descriptions ........................................................................................................ 72
3.2.1
3.2.2
3.2.3
3.2.4
Operating Mode Descriptions ........................................................................................... 78
3.3.1
3.3.2
3.3.3
Pin Functions in Each Operating Mode ............................................................................ 79
Memory Map in Each Operating Mode ............................................................................ 79
Overview........................................................................................................................... 91
4.1.1
4.1.2
4.1.3
Reset.................................................................................................................................. 94
4.2.1
4.2.2
4.2.3
Interrupts ........................................................................................................................... 97
Trap Instruction................................................................................................................. 98
Stack Status after Exception Handling.............................................................................. 99
Notes on Use of the Stack ................................................................................................. 100
Bus-Released State............................................................................................... 65
Power-Down State ............................................................................................... 65
Overview.............................................................................................................. 66
On-Chip Memory (ROM, RAM) ......................................................................... 66
On-Chip Supporting Module Access Timing ...................................................... 68
External Address Space Access Timing .............................................................. 69
Operating Mode Selection ................................................................................... 71
Register Configuration......................................................................................... 72
Mode Control Register (MDCR) ......................................................................... 72
System Control Register (SYSCR) ...................................................................... 73
Bus Control Register (BCR) ................................................................................ 75
Serial Timer Control Register (STCR) ................................................................ 76
Mode 1 ................................................................................................................. 78
Mode 2 ................................................................................................................. 78
Mode 3 ................................................................................................................. 78
Exception Handling Types and Priority............................................................... 91
Exception Handling Operation............................................................................. 92
Exception Sources and Vector Table ................................................................... 92
Overview.............................................................................................................. 94
Reset Sequence .................................................................................................... 94
Interrupts after Reset............................................................................................ 96
......................................................................................... 91
.................................................................................. 71