DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 40

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 10.4 (3) Output Waveform.............................................................................................. 268
Figure 10.4 (4) Output Waveform.............................................................................................. 268
Section 11 16-Bit Free-Running Timer
Figure 11.1
Figure 11.2
Figure 11.3
Figure 11.4
Figure 11.5
Figure 11.6
Figure 11.7
Figure 11.8
Figure 11.9
Figure 11.10
Figure 11.11
Figure 11.12
Figure 11.13
Figure 11.14
Figure 11.15
Figure 11.16
Figure 11.17
Figure 11.18
Figure 11.19
Figure 11.20
Figure 11.21
Section 12 8-Bit Timers
Figure 12.1
Figure 12.2
Figure 12.3
Figure 12.4
Figure 12.5
Figure 12.6
Figure 12.7
Figure 12.8
Figure 12.9
Rev. 4.00 Jun 06, 2006 page xxxviii of liv
Block Diagram of 16-Bit Free-Running Timer ................................................. 270
Input Capture Buffering (Example)................................................................... 274
Increment Timing with Internal Clock Source .................................................. 287
Increment Timing with External Clock Source ................................................. 288
Timing of Output Compare A Output ............................................................... 288
Clearing of FRC by Compare-Match A............................................................. 289
Input Capture Signal Timing (Usual Case)........................................................ 289
Input Capture Signal Timing
(Input Capture Input When ICRA/B/C/D Is Read)............................................ 290
Buffered Input Capture Timing (Usual Case).................................................... 290
Buffered Input Capture Timing
(Input Capture Input When ICRA or ICRC Is Read) ........................................ 291
Setting of Input Capture Flag (ICFA to ICFD).................................................. 292
Setting of Output Compare Flag (OCFA, OCFB) ............................................. 293
Setting of Overflow Flag (OVF)........................................................................ 294
OCRA Automatic Addition Timing .................................................................. 294
Input Capture Mask Signal Setting Timing ....................................................... 295
Input Capture Mask Signal Clearing Timing..................................................... 295
Pulse Output (Example) .................................................................................... 297
FRC Write-Clear Contention............................................................................. 298
FRC Write-Increment Contention ..................................................................... 299
Contention between OCR Write and Compare-Match
(When Automatic Addition Function Is Not Used)........................................... 300
Contention between OCRAR/OCRAF Write and Compare-Match
(When Automatic Addition Function Is Used).................................................. 301
Block Diagram of 8-Bit Timer Module ............................................................. 306
Count Timing for Internal Clock Input.............................................................. 325
Count Timing for External Clock Input............................................................. 326
Timing of CMF Setting ..................................................................................... 326
Timing of Timer Output .................................................................................... 327
Timing of Compare-Match Clear ...................................................................... 327
Timing of Clearing by External Reset Input...................................................... 328
Timing of OVF Setting...................................................................................... 328
Timing of Input Capture Operation ................................................................... 330