DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 734

IC H8S/2100 MCU FLASH 80QFP

DF2134AFA20V

Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2134AFA20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 23 Clock Pulse Generator
t
t
EXCLH
EXCLL
V
0.5
EXCL
CC
t
t
EXCLr
EXCLf
Figure 23.8 Subclock Input Timing
When Subclock Is Not Needed: Do not enable subclock input when the subclock is not needed.
In transiting to power-down mode, if at least two cycles of the
Note on Subclock Usage:
32-kHz clock are not input after the 32-kHz clock input is enabled (EXCLE = 1) until the
SLEEP instruction is executed (power-down mode transition), the subclock input circuit is
not initialized and an error may occur in the microcomputer.
Before power-down mode is entered with using the subclock, at least two cycle of the 32-kHz
clock should be input after the 32-kHz clock input is enabled (EXCLE = 1).
As described in the hardware manual (clock pulse generator/subclock input circuit), when the
subclock is not used, the subclock input should not be enabled (EXCLE = 0).
23.8
Subclock Waveform Shaping Circuit
To eliminate noise in the subclock input from the EXCL pin, this circuit samples the clock using a
clock obtained by dividing the clock. The sampling frequency is set with the NESEL bit in
LPWRCR. For details, see section 24.2.2, Low-Power Control Register (LPWRCR). The clock is
not sampled in subactive mode, subsleep mode, or watch mode.
Rev. 4.00 Jun 06, 2006 page 678 of 1004
REJ09B0301-0400

Related parts for DF2134AFA20V