DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 321

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.4
A PWM waveform like the one shown in figure 10.3 is output from the PWMX pin. When OS =
0, the value in DADR corresponds to the total width (T
conversion cycle (256 pulses when CFS = 0, 64 pulses when CFS = 1). When OS = 1, the output
waveform is inverted and the DADR value corresponds to the total width (T
output pulses. Figure 10.4 shows the types of waveform output available.
Table 10.4 summarizes the relationships of the CKS, CFS, and OS bit settings to the resolution,
base cycle, and conversion cycle. The PWM output remains flat unless DADR contains at least a
certain minimum value. Table 10.4 indicates the range of DADR settings that give an output
waveform like the one in figure 10.3, and lists the conversion cycle length when low-order DADR
bits are kept cleared to 0, reducing the conversion precision to 12 bits or 10 bits.
Basic cycle
(T
Operation
t
L
64 or T
t
f
256)
Figure 10.3 PWM D/A Operation
(T
1 conversion cycle
2
T: Resolution
T
(When CFS = 0, m = 256; when CFS = 1, m = 64)
14
L
=
(= 16384))
n = 1
m
t
Ln
L
(when OS = 0)
) of the low (0) pulses output in one
Rev. 4.00 Jun 06, 2006 page 265 of 1004
Section 10 14-Bit PWM D/A
H
) of the high (1)
REJ09B0301-0400