UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 964

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

962
4th edition
Edition
Change of Figure 13-30 Timing Chart of Master Transmission (in Continuous
Transmission Mode) (Type 1: DAPmn = 0, CKPmn = 0)
Modification of Figure 13-36 Timing Chart of Master Reception (in Single-
Reception Mode) (Type 1: DAPmn = 0, CKPmn = 0)
Change of Figure 13-40 Procedure for Stopping Master Transmission/Reception
Change of Figure 13-41 Procedure for Resuming Master
Transmission/Reception
Modification of Figure 13-42 Timing Chart of Master Transmission/Reception (in
Single-Transmission/Reception Mode) (Type 1: DAPmn = 0, CKPmn = 0)
Modification of Figure 13-44 Timing Chart of Master Transmission/Reception (in
Continuous Transmission/Reception Mode) (Type 1: DAPmn = 0, CKPmn = 0)
Change of transfer rate in 13.5.4 Slave transmission
Change of Figure 13-48 Procedure for Stopping Slave Transmission
Change of Figure 13-49 Procedure for Resuming Slave Transmission
Change of Figure 13-50 Timing Chart of Slave Transmission (in Single-
Transmission Mode) (Type 1: DAPmn = 0, CKPmn = 0)
Change of Figure 13-52 Timing Chart of Slave Transmission (in Continuous
Transmission Mode) (Type 1: DAPmn = 0, CKPmn = 0)
Change of Figure 13-53 Flowchart of Slave Transmission (in Continuous
Transmission Mode)
Change of transfer rate in 13.5.5 Slave reception
Change of (b) Serial output enable register m (SOEm) in Figure 13-54. Example
of Contents of Registers for Slave Reception of 3-Wire Serial I/O (CSI00, CSI01,
CSI10, CSI11, CSI20, CSI21)
Modification of Figure 13-58 Timing Chart of Slave Reception (in Single-
Reception Mode) (Type 1: DAPmn = 0, CKPmn = 0)
Change of transfer rate in 13.5.6 Slave transmission/reception
Change of Figure 13-62 Procedure for Stopping Slave Transmission/Reception
Change of Figure 13-63 Procedure for Resuming Slave Transmission/Reception
Modification of Figure 13-64 Timing Chart of Slave Transmission/Reception (in
Single-Transmission/Reception Mode) (Type 1: DAPmn = 0, CKPmn = 0)
Modification of Figure 13-66 Timing Chart of Slave Transmission/Reception (in
Continuous Transmission/Reception Mode) (Type 1: DAPmn = 0, CKPmn = 0)
Change of 13.5.7 Calculating transfer clock frequency
Change of Note 2 in Table 13-2 Selection of Operation Clock
Addition of Caution to 13.6 Operation of UART (UART0, UART1, UART2, UART3)
Communication
Change of Figure 13-70 Procedure for Stopping UART Transmission
Change of Figure 13-72 Timing Chart of UART Transmission (in Single-
Transmission Mode)
Change of Figure 13-74 Timing Chart of UART Transmission (in Continuous
Transmission Mode)
Change of 13.6.2 UART reception
APPENDIX C REVISION HISTORY
User’s Manual U18432EJ5V0UD
Description
CHAPTER 13 SERIAL
ARRAY UNIT
(continuation)
Chapter
(10/13)