UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 157

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.2.13 Port 13
specified by pull-up resistor option register 13 (PU13).
P130 is a 1-bit output-only port with an output latch.
P131 is a 1-bit I/O port with an output latch. When used as an input port, use of an on-chip pull-up resistor can be
Reset signal generation sets port 13 to input mode.
This port can also be used for timer I/O.
Figures 4-43 and 4-44 show block diagrams of port 13.
Caution To use P131/TI06/TO06 as a general-purpose port, set bit 6 (TO06) of timer output register 0 (TO0)
Remark When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
P13:
RD:
WR××: Write signal
and bit 6 (TOE06) of timer output enable register 0 (TOE0) to “0”, which is the same as their
default status setting.
effected, the output signal of P130 can be dummy-output as the CPU reset signal.
WR
RD
Read signal
Port register 13
PORT
Reset signal
P130
Output latch
(P130)
P13
Figure 4-43. Block Diagram of P130
CHAPTER 4 PORT FUNCTIONS
User’s Manual U18432EJ5V0UD
Set by software
P130
155