UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 273

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Address: F01BEH, F01BFH
Address: F01E6, F01E7H
Symbol
Symbol
(12) Timer output mode register m (TOMm)
TOM0
TOM1
Caution Be sure to clear bits 15 to 8 of TOM0 and bits 15 to 4 of TOM1 to “0”.
Remark
TOMm is used to control the timer output mode of each channel.
When a channel is used for the single-operation function, set the corresponding bit of the channel to be used
to 0.
When a channel is used for the combination-operation function (PWM output, one-shot pulse output, or
multiple PWM output), set the corresponding bit of the master channel to 0 and the corresponding bit of the
slave channel to 1.
The setting of each channel n by this register is reflected at the timing when the timer output signal is set or
reset while the timer output is enabled (TOEmn = 1).
TOMm can be set by a 16-bit memory manipulation instruction.
The lower 8 bits of TOMm can be set with an 8-bit memory manipulation instruction with TOMmL.
Reset signal generation clears this register to 0000H.
TOM
mn
15
15
0
1
0
0
m: Unit number, n: Channel number, p: Slave channel number
When m = 0
When m = 1
n = 0 to 7 (n = 0, 2, 4, 6 for master channel)
n < p ≤ 7 (where p is a consecutive integer greater than n)
n = 0 to 3 (n = 0, 2 for master channel)
n < p ≤ 3 (where p is a consecutive integer greater than n)
Toggle mode (to produce toggle output by timer interrupt request signal (INTTMmn))
Combination operation mode (output is set by the timer interrupt request signal (INITTMmn) of the master
channel, and reset by the timer interrupt request signal (INITTMmp) of the slave channel)
14
14
0
0
Figure 7-21. Format of Timer Output Mode Register m (TOMm)
After reset: 0000H
After reset: 0000H
13
13
0
0
12
12
0
0
11
11
0
0
CHAPTER 7 TIMER ARRAY UNIT
R/W
User’s Manual U18432EJ5V0UD
R/W
10
10
0
0
Control of timer output mode of channel n
9
0
9
0
8
0
8
0
TOM
07
7
7
0
TOM
06
6
6
0
TOM
05
5
5
0
TOM
04
4
4
0
TOM
TOM
03
13
3
3
TOM
TOM
02
12
2
2
TOM
TOM
01
11
1
1
TOM
TOM
00
10
271
0
0