UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 548

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note1
SE
00
0
1
13.8 Relationship Between Register Settings and Pins
0 and 1.
Notes 1. The SE0 register is a read-only status register which is set using the SS0 and ST0 registers.
546
Remark X: Don’t care
Table 13-5. Relationship between register settings and pins (Channel 0 of unit 0: CSI00, UART0 transmission)
002
MD
Tables 13-5 to 13-12 show the relationship between register settings and pins for each channel of serial array units
0
0
0
0
2. When channel 1 of unit 0 is set to UART0 reception, this pin becomes an RxD0 function pin (refer to Table
3. This pin can be set as a port function pin.
4. This is 0 or 1, depending on the communication operation. For details, refer to 13.3 (12) Serial output
5. When using UART0 transmission and reception in a pair, set channel 1 of unit 0 to UART0 reception (refer
MD
001
0
1
0
1
13-6). In this case, operation stop mode or UART0 transmission must be selected for channel 0 of unit 0.
register m (SOm).
to Table 13-6).
SOE
00
0
0
1
1
0
1
1
1
Note4
Note4
Note4
Note4
Note4
0/1
0/1
SO
0/1
0/1
0/1
00
1
1
1
CKO
Note4
Note4
Note4
0/1
0/1
0/1
00
1
1
1
1
1
TXE
00
0
0
1
1
0
1
1
1
RXE
00
0
1
0
1
1
0
1
0
PM1
Note3
Note3
0
×
×
1
1
1
0
0
0
CHAPTER 13 SERIAL ARRAY UNIT
P10 PM
Note3
Note3
×
×
×
×
1
1
1
×
User’s Manual U18432EJ5V0UD
Note2
Note3
Note3
Note3
Note3
11
1
×
1
1
×
1
×
×
P11
Note3
Note3
Note2
Note3
Note3
×
×
×
×
×
×
×
×
Note3
Note3
PM
Note3
12
×
0
0
×
0
0
0
×
P12
Note3
Note3
Note3
×
×
×
1
1
1
1
1
Operation mode
transmission
Operation stop
Master CSI00
Master CSI00
Master CSI00
transmission/
transmission/
Slave CSI00
Slave CSI00
transmission
Slave CSI00
transmission
reception
reception
reception
reception
UART0
mode
Note5
EX24/P10
EX24/P10
(output)
(output)
(output)
SCK00/
SCK00
SCK00
SCK00
SCK00
SCK00
SCK00
(input)
(input)
(input)
P10
SI00/EX25/
EX25/P11/
EX25/P11/
RxD0/P11
EX25/P11
Pin Function
RxD0
RxD0
SI00
SI00
SI00
SI00
P11
P11
Note2
SO00/EX26/
EX26/P12
TxD0/P12
SO00
SO00
SO00
SO00
TxD0
P12
P12