UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 923

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Timer
array unit
Function
Channel output
(TOmn pin)
operation
TPSm: Timer
clock select
register m
TMRmn: Timer
mode register
mn
TSm: Timer
channel start
register m
TTm: Timer
channel stop
register m
TOEm: Timer
output enable
register m
TOm: Timer
output register m
TOLm: Timer
output level
register m
TOMm: Timer
output mode
register m
ISC: Input switch
control register
Details of
Function
Be sure to clear bits 15 to 8 to “0”.
Be sure to clear bits 14, 13, 5, and 4 to “0”.
Be sure to clear bits 15 to 8 of TS0 and bits 15 to 4 of TS1 to “0”
In the first cycle operation of count clock after writing TSmn, an error at a maximum
of one clock is generated since count start delays until count clock has been
generated. When the information on count start timing is necessary, an interrupt can
be generated at count start by setting MDmn0 = 1.
An input signal sampling error is generated since operation starts upon start trigger
detection (The error is one count clock when TImn is used).
Be sure to clear bits 15 to 8 of TT0 and bits 15 to 4 of TT1 to “0”.
Be sure to clear bits 15 to 8 of TOE0 and bits 15 to 4 of TOE1 to “0”.
Be sure to clear bits 15 to 8 of TO0 and bits 15 to 4 of TO1 to “0”.
Be sure to clear bits 15 to 8 of TOL0 and bits 15 to 4 of TOL1 to “0”.
Be sure to clear bits 15 to 8 of TOM0 and bits 15 to 4 of TOM1 to “0”.
Be sure to clear bits 7 to 2 to “0”.
(1) Changing values set in registers TOm, TOEm, TOLm, and TOMm during timer
operation
Since the timer operations (operations of TCRmn and TDRmn) are independent of
the TOmn output circuit and changing the values set in TOm, TOEm, TOLm, and
TOMm does not affect the timer operation, the values can be changed during timer
operation. To output an expected waveform from the TOmn pin by timer operation,
however, set TOm, TOEm, TOLm, and TOMm to the values stated in the register
setting example of each operation.
When the values set in TOEm, TOLm, and TOMm (except for TOm) are changed
close to the timer interrupt (INTTMmn), the waveform output to the TOmn pin may be
different depending on whether the values are changed immediately before or
immediately after the timer interrupt (INTTMmn) signal generation timing.
APPENDIX B LIST OF CAUTIONS
User’s Manual U18432EJ5V0UD
Cautions
p.255
p.256
p.261
pp.262,
263
pp.264,
265
p.266
p.268
p.269
p.270
p.271
p.272
p.278
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