UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 296

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.7.2 Operation as external event counter
(external event) is detected in the TImn pin. When a specified count value is reached, the event counter generates an
interrupt. The specified number of counts can be calculated by the following expression.
TCRmn loads the value of TDRmn again, and outputs INTTMmn.
294
The timer array unit can be used as an external event counter that counts the number of times the valid input edge
TCRmn operates as a down counter in the event counter mode.
When the channel start trigger bit (TSmn) is set to 1, TCRmn loads the value of TDRmn.
TCRmn counts down each time the valid input edge of the TImn pin has been detected. When TCRmn = 0000H,
After that, the above operation is repeated.
TOmn must not be used because its waveform depends on the external event and irregular.
TDRmn can be rewritten at any time. The new value of TDRmn becomes valid during the next count period.
TImn pin
Specified number of counts = Set value of TDRmn + 1
Remark
TSmn
Figure 7-42. Example of Basic Timing of Operation as External Event Counter
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7),
mn = 00 to 07, 10 to 13
INTTMmn
detection
TCRmn
TDRmn
Figure 7-41. Block Diagram of Operation as External Event Counter
Edge
TSmn
TEmn
TImn
0000H
3
CHAPTER 7 TIMER ARRAY UNIT
4 events
2
0003H
User’s Manual U18432EJ5V0UD
1
0
Timer counter
Data register
(TCRmn)
(TDRmn)
3
4 events
2
1
0
2
3 events
0002H
1
controller
Interrupt
0
2
1
Interrupt signal
(INTTMmn)

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