UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 288

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.7 Operation of Timer Array Unit as Independent Channel
7.7.1 Operation as interval timer/square wave output
286
(1) Interval timer
(2) Operation as square wave output
The timer array unit can be used as a reference timer that generates INTTMmn (timer interrupt) at fixed
intervals.
The interrupt generation period can be calculated by the following expression.
A subsystem clock divided by four (f
Consequently, the interval timer can be operated with the count clock fixed to f
frequency (main system clock, subsystem clock). When changing the clock selected as f
value of the system clock control register (CKC)), however, stop the timer array unit m (TAUm) (TT0 = 00FFH,
TT1 = 000FH) first.
TOmn performs a toggle operation as soon as INTTMmn has been generated, and outputs a square wave with
a duty factor of 50%.
The period and frequency for outputting a square wave from TOmn can be calculated by the following
expressions.
TCRmn operates as a down counter in the interval timer mode.
TCRmn loads the value of TDRmn at the first count clock after the channel start trigger bit (TSmn) is set to 1.
If MDmn0 of TMRmn = 0 at this time, INTTMmn is not output and TOmn is not toggled. If MDmn0 of TMRmn =
1, INTTMmn is output and TOmn is toggled.
After that, TCRmn count down in synchronization with the count clock.
When TCRmn = 0000H, INTTMmn is output and TOmn is toggled at the next count clock. At the same time,
TCRmn loads the value of TDRmn again. After that, the same operation is repeated.
TDRmn can be rewritten at any time. The new value of TDRmn becomes valid from the next period.
Remarks 1. m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7),
Generation period of INTTMmn (timer interrupt) = Period of count clock × (Set value of TDRmn + 1)
• Period of square wave output from TOmn = Period of count clock × (Set value of TDRmn + 1) × 2
• Frequency of square wave output from TOmn = Frequency of count clock/{(Set value of TDRmn + 1) × 2}
2. f
mn = 00 to 07, 10 to 13
f
CLK
SUB
: CPU/peripheral hardware clock frequency
: Subsystem clock oscillation frequency
CHAPTER 7 TIMER ARRAY UNIT
SUB
User’s Manual U18432EJ5V0UD
/4) can be selected as the count clock, in addition to CKm0 and CKm1.
SUB
/4, regardless of the f
CLK
(changing the
CLK

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