UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 554

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UPD78F1174AGF-GAT-AX

Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1174AGF-GAT-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note1
SE
11
0
1
0
1
0
552
112
Table 13-10. Relationship between register settings and pins (Channel 1 of unit 1: CSI21, UART2 reception, IIC21)
MD
0
0
1
0
0
1
(Note and Remark are given on the next page.)
111
MD
0
1
0
0
1
0
SOE
11
0
0
1
1
0
1
1
0
0
1
1
1
0
SO11 CKO
Note4
Note4
Note4
Note4
Note7
Note4
Note4
Note4
Note8
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
1
1
1
1
Note4
Note4
Note4
Note7
Note4
Note4
Note4
Note8
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
11
1
1
1
1
1
TXE
11
0
0
1
1
0
1
1
0
0
1
0
1
1
0
0
RXE
11
0
1
0
1
1
0
1
1
0
0
1
0
0
1
0
Note3
Note3
125
PM
×
1
1
1
0
0
0
×
0
0
0
0
0
CHAPTER 13 SERIAL ARRAY UNIT
125
Note3
Note3
P
×
×
×
×
1
1
1
×
1
1
1
1
1
User’s Manual U18432EJ5V0UD
126
Note3
Note3
Note3
Note3
PM
×
1
×
1
1
×
1
×
0
0
0
0
0
126
Note3
Note3
Note3
Note3
P
×
×
×
×
×
×
×
×
1
1
1
1
1
127
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
PM
×
×
0
0
×
0
0
×
×
×
×
×
×
127
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
P
×
×
1
1
×
1
1
×
×
×
×
×
×
Note2
143
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
PM
×
×
×
×
×
×
×
1
×
×
×
×
×
Note2
143
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
Note3
P
×
×
×
×
×
×
×
×
×
×
×
×
×
transmissi
Operation
Operation
transmission
transmission
/reception
transmission
transmission
/reception
reception
reception
reception
condition
transmissi
reception
condition
UART2
address
Master
Master
Master
CSI21
CSI21
CSI21
CSI21
CSI21
CSI21
mode
mode
Slave
Slave
Slave
Notes5, 6
IIC21
IIC21
IIC21
IIC21
IIC21
start
stop
data
data
stop
field
on
on
(output)
(output)
(output)
SCK21/
SCL21/
SCK21
SCK21
SCK21
SCK21
SCK21
SCK21
SCL21
SCL21
SCL21
SCL21
SCL21
(input)
(input)
(input)
P125
P125
P125
SDA21/
SDA21
SDA21
SDA21
SDA21
SDA21
SI21/
P126
P126
P126
P126
P126
SI21
SI21
SI21
SI21
Pin Function
SO21/
SO21
SO21
SO21
SO21
P127
P127
P127
P127
P127
P127
P127
P127
P127
P127
P143
P143
P143
P143
P143
P143
P143
P143
P143
P143
P143
P143
P143
SDA20/
SDA20/
SDA20/
SDA20/
SDA20/
SDA20/
SDA20/
SDA20/
SDA20/
SDA20/
SDA20/
SDA20/
SDA20/
RxD2/
RxD2
SI20/
SI20/
SI20/
SI20/
SI20/
SI20/
SI20/
SI20/
SI20/
SI20/
SI20/
SI20/
SI20/
Note2
Note2
Note2
Note2
Note2
Note2
Note2
Note2
Note2
Note2
Note2
Note2
Note2

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